1. Field of Invention
The present disclosure of invention relates to a gate driver, a method of driving the same, and a display device having the same. More particularly, the present invention relates to a gate driver, a method of driving the same, and a display device having the same that are capable of detecting occurrence of an error in a vertical synchronization start signal input from a timing controller.
2. Description of Related Technology
In general, a liquid crystal display (LCD) device includes a liquid crystal display panel, a gate driving unit, a data driving unit, a driving voltage generator, and a timing controller. The liquid crystal display panel includes a thin-film transistor substrate that has pixel electrodes formed thereon, a color filter substrate that has a common electrode formed thereon, and a liquid crystal layer that is interposed between the thin-film transistor substrate and the color filter substrate. The gate driving unit and the data driving unit apply signals to perform display operations on the liquid crystal display panel, and the driving voltage generator generates various driving voltages to drive the liquid crystal display device. The timing controller generates pixel data and control signals used to drive the gate driving unit, the data driving unit, and the driving voltage generator.
The gate driving unit connects to a plurality of gate lines on the thin-film transistor substrate and it correspondingly includes a plurality of gate drivers each of which includes a shift register unit, a level shifter unit, and an output buffer unit for driving its respective gate line. The shift register unit performs a shift operation in response to a vertical synchronization start signal and a gate clock signal input from the timing controller. In response to a generated shift signal, the level shifter shifts a level of the shift signal to a level of a gate turn-on voltage (VGon) or a gate turn-off voltage (VGoff). The output buffer unit then transmits the gate turn-on voltage or the gate turn-off voltage to a corresponding one of the gate lines. Here, the gate turn-on voltage and the gate turn-off voltage are generated by the driving voltage generator.
The timing controller uses a data enable signal input from a system to generate the vertical synchronization start signal and a gate clock signal to drive the gate driver. However, in a conventional system, even when an error occurs in the data enable signal provided from the host system, the timing controller uses the data enable signal as it is to generate the vertical synchronization start signal. As a result, an error also occurs in the vertical synchronization start signal.
In general, only one vertical synchronization start signal should be generated for each frame. However, the data enable signal may be irregularly supplied to the timing controller from a host system, for example such as at a time of a screen mode conversion in a TV image in response to an external input commanding such a mode change. In this case, the timing controller can undesirably output a plurality of vertical synchronization start signals before one corresponding frame ends. If the plurality of vertical synchronization start signals are simultaneously responded to during one frame, the conventional gate driver simultaneously outputs the gate turn-on voltage to a plurality of gate lines. In this case, the gate turn-on voltage that is generated by the driving voltage generator needs to be simultaneously supplied to a load comprised of a plurality of level shifters. In one class of embodiments, the magnitude of current of the driving voltage generator, which is needed to supply a desired voltage to one level shifter, is approximately several tens of milliamperes, but if the voltage is simultaneously supplied to the plurality of level shifters, overload is generated in the driving voltage generator, which causes the driving voltage generator to shut down as a safety precaution. That is, if the plurality of level shifters simultaneously operate, a large amount of current flows through the driving voltage generator that supplies a high voltage to the level shifters, which causes the driving voltage generator to shut down and then the whole screen may fail to operate properly during the frame.